Charge-Based MOS Transistor Modeling: The EKV Model for by Christian C. Enz, Eric A. Vittoz

By Christian C. Enz, Eric A. Vittoz

Sleek, large-scale analog built-in circuits (ICs) are basically composed of metal-oxide semiconductor (MOS) transistors and their interconnections. As expertise scales all the way down to deep sub-micron dimensions and provide voltage decreases to minimize strength intake, those complicated analog circuits are much more depending on the precise habit of every transistor. High-performance analog circuit layout calls for a truly particular version of the transistor, describing thoroughly its static and dynamic behaviors, its noise and matching obstacles and its temperature diversifications. The charge-based EKV (Enz-Krummenacher-Vittoz) MOS transistor version for IC layout has been constructed to supply a transparent figuring out of the gadget houses, with no using advanced equations. the entire static, dynamic, noise, non-quasi-static versions are thoroughly defined when it comes to the inversion cost on the resource and on the drain profiting from the symmetry of the equipment. because of its hierarchical constitution, the version bargains numerous coherent description degrees, from easy hand calculation equations to accomplish desktop simulation version. it's also compact, with a minimal variety of process-dependant gadget parameters.

Written by means of its builders, this booklet presents a complete therapy of the EKV charge-based version of the MOS transistor for the layout and simulation of low-power analog and RF ICs. basically break up into 3 components, the authors systematically learn:

  • the uncomplicated long-channel intrinsic charge-based version, together with the entire basic facets of the EKV such a lot version equivalent to the elemental large-signal static version, the noise version, and a dialogue of temperature results and matching homes;
  • the prolonged charge-based version, providing vital details for realizing the operation of deep-submicron units;
  • the high-frequency version, starting off a whole MOS transistor version required for designing RF CMOS built-in circuits.

practicing engineers and circuit designers within the semiconductor gadget and electronics structures will locate this e-book a important advisor to the modelling of MOS transistors for built-in circuits. it's also an invaluable reference for complex scholars in electric and machine engineering.

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Extra info for Charge-Based MOS Transistor Modeling: The EKV Model for Low-Power and RF IC Design

Example text

5. 1, both VS and VD are in the section of the Q i (V ) characteristics corresponding to strong inversion. The channel is strongly inverted from source to drain and the transistor is said to be in linear mode. 4. Alternative appellations are nonsaturation mode [1] (meaning that the drain current keeps increasing with the drain voltage) and triode mode (referring to the nonsaturating output characteristics of the old triode vacuum tube). In French, this mode is called conduction [17], and this terminology has been previously used in some of the authors’ publications.

This part is self-contained and the reader can stop after it while still having a strong background in all the fundamental aspects of the EKV MOS transistor model. It includes all the most important aspects such as basic large-signal static model, small-signal dynamic model, noise model, and a discussion of temperature effects and matching properties. The other parts complete the basic model by adding more detailed descriptions of advanced aspects. Part II presents more advanced aspects which are of utmost importance for understanding the operation of deep-submicron devices.

Both VS and VD can be slightly negative without qualitatively changing the modes of operation described above. However, if these negative values exceed a few hundreds of millivolts, the forward-biased junctions inject minority carriers (electrons for the N-channel transistor) in the local substrate. A parasitic bipolar transistor is superimposed on the MOS transistor. This bipolar mode of operation can be usefully exploited if MOS operation is blocked by applying a negative gate voltage [68,74].

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